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CT2566 20100 KAD0712D HMC341 KAD0712D LSPBT670 300SB UC3843
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  copyright ? potato semiconductor corporation quad differential lvds/lvpecl/hstl to lvttl translator PO100HSTL32A 04/19/09 1 feature s : pi n co n f i gu r at i on l o gic block diagra m pin de s cription descript i o n : potato semiconductor? PO100HSTL32A is designed for world top performance using submicron cmos technology to achieve 1ghz lvttl output frequency with less than 1.8ns propagation delay. the PO100HSTL32A is a low-skew, the small outline 16 pin package and the low skew design to make it ideal for applica- tions which require the translation of a clock or a data signal. ? patented technology ? differential lvds/lvpecl/hstl to lvttl translator ? operating frequency up to 1 gh z with 2pf load ? operating frequency up to 800m h z with 5pf load ? operating frequency up to 450mhz with 15pf load ? very low output pin to pin skew < 150ps ? propagation delay < 1.8ns max with 15pf load ? 2.4v to 3.6v power supply ? industrial temperature range: ?0? to 85? ? a v a il a b l e i n 16-p i n soic 150ml pac k a g e 1 2 3 4 5 6 7 8 16 15 14 13 12 1 1 10 9 1b 1a 1y g 2y 2a 2b gnd v c c 4b 4a 4y g 3y 3a 3b g g 1a 1b 2a 2b 3a 3b 4a 4b 4 12 2 1 6 7 10 9 14 15 3 5 1 1 13 1y 2y 3y 4y enables differential input output a, b y g g h x h v id 10 mv x l h h x ? 10 mv < v id < 10 mv x l ? h x l v id 10 mv x l l x l h z h x h open x l h
copyright ? potato semiconductor corporation 2 m ax i m u m ra t i n g s dc elec t r ical charac t eris t ics s y m b o l descrip t i o n tes t c o ndi t i o n s m i n t y p m a x uni t v o h o u t p u t h i g h v o lt a g e v cc= 3 v v i n = v i h o r v i l , i o h = - 12 m a 2. 4 3 - v v o l o u t p u t l o w v o lt a g e v cc= 3 v v i n = v i h o r v i l , i o h = 12 m a - 0.3 0.5 v v i h i n p u t h i g h v o lt a g e g u ara n t ee d l o g i c h i gh l e ve l ( i np u t p i n ) 2 - vcc v v i l i n p u t l o w v o lt a g e g u ara n t ee d l o g i c l o w l e v e l (i np u t p i n ) - 0 . 5 - 0. 8 v i i h i n p u t hi g h c u rr e n t v cc = 3 . 6 v a n d vin = vcc - - 1 u a i i l i n p u t l o w c u rre n t v cc = 3 . 6 v a n d v i n = 0 v - - -1 u a v i k c l a m p d i o d e v o lt a g e v cc = m i n . a nd i i n = - 18 m a - -0.7 -1.2 v notes : 1 . f o r c o n d i t i o n s s h o w n a s m a x. or m i n. , u s e a p p r o p ri a t e v a l u e s p e c i f i e d un d er e l e c t r i ca l c h a r a c t e r i s t i c s for t h e a p pl i ca b le d e v i c e t y p e . 2 . t y p i ca l v a l u es are a t v cc = 3 . 3 v , 2 5 c a m b i e n t . 3 . t h is p a r a m e t e r is g u a r a n t ee d but not t e st e d . 4 . n o t m o r e th a n o n e o u t put s h o u l d b e s ho r t e d a t on e ti m e . d u r a ti o n o f th e t e s t s h o u l d n o t e x cee d on e s ec ond . 5 . v o h = v cc 0 . 6 v a t r a t e d c u rr e n t d e s cr i p t i on m ax u n i t s t or a g e tem p e r at ur e -65 t o 150 c operation tem p eratu r e -40 to 85 c operation volt a g e -0.5 to +4.6 v i nput volt a ge -0.5 to vcc v output volta g e -0.5 to vc c + 0.5 v note : s t re ss e s g r eater t h a n li s t e d un d e r ma x i m u m r a t i n g s m a y ca u s e p e r m a n e n t d a m a g e t o t h e d e v i ce . t h i s is a stress rati n g o n l y a n d f u n c ti o n a l operatio n o f t h e de v i ce at t h e s e or an y o t h e r co n d iti on s abo v e t h o s e i n d i ca t e d i n t h e o p e rati o n a l secti o n s o f t h i s s p eci f icati o n i s n o t i m p lie d . e x p o s u r e t o a b s o l u te m a x i m u m r a ti n g c o n d iti o n s f o r e x te n d ed period s m a y a f f ec t relia b ili t y s p ec i f icati o n is n o t i m p lie d . pin characteristics l o b m y s r e t e m a r a s p n o i t i d n o c t s e m t u m i n i m l a c i p y t m u m i x a m s t i n u c n i e c n a t i c a p a c t u p n i f 4 p r p u l l u p r o t s i s e r p u l l u p t b u p n i 88 88 k k r n w o d l l u p r o t s i s e r n w o d l l u p t a u p n i quad differential lvds/lvpecl/hstl to lvttl translator PO100HSTL32A 04/19/09
po w er supply c h aracteristics s y m b o l descrip t i o n tes t c o ndi t i o n s ( 1 ) m i n t y p m a x uni t ic c q qui e s ce n t p o w e r su p p l y curr e n t v cc= m a x , v i n = v cc o r g n d - 0.1 30 ua notes : 1 . f o r c o n d i t i o n s s h o w n a s m a x. or m i n. , u s e a p p r o p ri a t e v a l u e s p e c i f i e d un d er e l e c t r i ca l c h a r a c t e r i s t i c s for t h e a p pl i ca b le d e v i c e t y p e . 2 . t y pica l v a l u e s a r e a t v c c = 3 . 3 v , 2 5 c a m b i e n t. 3 . t h i s p a r a m e t e r i s g u a r an t ee d b u t n o t te s t e d . 4 . n o t m o r e t h a n o n e o u t p u t s h o u l d b e s h o r t e d a t o n e ti m e . d u r a ti o n o f t h e t e s t s h o u l d n o t e x c ee d o n e s e c o nd . s w i t ching charac t eris t ics t i n u x a m ) 1 ( s n o i t i d n o c t s e t n o i t p i r c s e d l o b m y s t pd p r o p a g a ti o n d e l a y d to output pair c l = 1 5 p f 1.8 ns tr / t f ri s e / f a ll t i m e 0. 8 v 2. 0 v 0.8 ns tsk(o) o utp u t p i n t o p i n s k e w ( s a m e p ac k a g e ) ps ps t s k ( pp ) o u tp u t s k e w ( d i ff e r e nt p ac k a g e ) f m ax f p 5 1 = l c y c n e u q e r f t u p n i 250 mhz f m ax f p 5 = l c y c n e u q e r f t u p n i 300 mhz f m ax f p 2 = l c y c n e u q e r f t u p n i 400 mhz notes : 1 . s ee t e s t c i r c u i t s a n d w a v e f o r ms . 2 . tp l h , tp h l , t s k ( p ) , a n d t s k ( o ) a r e p r o d u c t i o n t e s t e d . a ll o th e r pa r a m e t e r s g u a r a n t ee d b u t n o t p r od u c ti o n t e s t e d . 3 . a i r f l o w o f 1 m / s i s r e c o mm e nd e d f o r f r e q u e nci e s a b ov e 1 3 3 m h z copyright ?potato semiconductor corporation 3 c l = 15pf , 1 2 5m h z c l = 15pf , 1 2 5m h z 150 300 450 800 1000 test cir c uit 5 0 5 0 15pf to 2pf pulse generator v+ v- vcc v+ v- d.u.t quad differential lvds/lvpecl/hstl to lvttl translator PO100HSTL32A 04/19/09 t p z h o r t p z l o utp u t e n a b l e t i m e c l = 1 5 p f 2.5 ns t ph z o r t p l z o u t p ut disa b l e t i m e c l = 1 5 p f 2.5 ns
test waveforms copyright ?potato semiconductor corporation 4 vpp range 0v-vcc figure 1. lvds/ pecl/ ecl/ hstl /differential input waveform definitions figure 2. lvttl output figure 3. propogation delay, output pulse skew, and output-to-output skew for d to output vpp tphl tplh tpd input clock output clock another output clock vo tsk(o) vcc= 3.3v vee=0.0v vih vil vpp vcc vee vo tr,tf, quad differential lvds/lvpecl/hstl to lvttl translator PO100HSTL32A 04/19/09
copyright ?potato semiconductor corporation 5 quad differential lvds/lvpecl/hstl to lvttl translator PO100HSTL32A 04/19/09 p a c k aging mech a n ical dra w ing : 1 6 pin soic .050 bsc 1 16 .149 .157 3.78 3.99 .386 .393 9.80 10.00 1.27 .053 .068 1.35 1.75 .0040 .0098 0.10 0.25 .013 .020 .0155 .0260 0.330 0.508 0.393 0.660 .0075 .0098 0.19 0.25 .016 .050 0.41 1.27 .2284 .2440 5.80 6.20 x.xx x.xx denotes dimensions in millimeters ordering information top-marking ordering code package 16 - pin soic tube pb-free & green 16 - pin soic tape and reel pb-free & green PO100HSTL32Asu PO100HSTL32Asr PO100HSTL32As PO100HSTL32As -40 c to 85 c -40 c to 85 c t a ic package information p a c k a ge code p a c k a ge type qty per tube t ape width (mm) t ape pi t ch (mm) pin 1 l oc a tion t ape trailer len g th qty per reel t ape leader len g th s soic 16 16 8 t op l eft corner 39 (12? 3000 64 (20? 48


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